| Contact |
|---|
| gdg@fnal.gov |
Associate Research Scientist Giuseppe Di Guglielmo is a hardware engineer and researcher with 10+ years of experience in system-level design, HLS, and FPGA-based acceleration with a Ph.D. in hardware verification. Prior to his current position as Senior ASIC Engineer at Fermilab, he was a member of the System-Level Design Group in the Department of Computer Science at Columbia.